In the repository aosp (Android Open Source Project), which develops the original texts of the Android platform, the beginning providing support for devices with processors based on architecture RISC-V.
A set of changes for support for RISC-V is prepared by Alibaba Cloud and includes 76 patches covering various subsystems, including graphic stack, sound system components, Bionic Library, Dalvik virtual machine, Framivorks, Wi-Fi and Bluetooth glass, Wi-Fi and Bluetooth. Tools for developers and various third -party modules, including models for Tensorflow Lite and machine learning modules for text recognition, classification of sound and images. 30 patches associated with the systemic environment and libraries have already been integrated from the general set of patches in AOSP.
Over the next few months, Alibaba Cloud intends to transfer additional patches to the AOSP that provide RISC-V support in the nucleus, Android Runtime (ART) and emulator. To support RISC-V’s support in Android, RISC-V International has created a special working group Android Sig , which may be joined and other companies interested in the work of the Android program stack on RISC-V processors. RISC-V support promotion in the main composition of Android is carried out in cooperation with Google and representatives of the community.
The changes proposed for Android were prepared as part of the initiative to expand the areas of use of devices based on the RISC-V architecture. Last year, Alibaba opened achievements associated with RISC-V Xuantie processors, and began active RISC-V promotion not only for IoT-Ustroystvsti and server systems, but also for consumer devices and various specialized chips covering various areas of application, from multimedia systems to processing signals and accelerators for machine learning.
RISC-V provides an open and flexible system of machine instructions that allows you to create microprocessors for arbitrary areas of application, without requiring deductions and without imposing the conditions for use. RISC-V allows you to create completely open SOC and processors. Currently, on the basis of the RISC-V specification, different companies and communities under various free licenses (BSD, MIT, Apache 2.0) are developing several dozen options Nuclei of microprocessors, about a hundred SOC and already produced chips. RISC-V support is present starting with GLIBC 2.27, Binutils 2.30, GCC 7 and Linux 4.15.