The team from the IBM Research presented their achievements in the development of analog chips for artificial intelligence tasks using the principles of the functioning of the human brain.
Their latest work was published in the journal Nature Electronics and is called “64-core computing chip with mixed signals, based on memory phase change for a deep output of neural networks.”
Researchers from IBM announced the application of a new approach to the analysis of states that allows for increased efficiency and reduced battery charge in artificial intelligence projects. Tanos Vasilopulos, one of the co-authors of the study from the IBM laboratory in Zurich, highlighted the impressive energy efficiency of the human brain.
The chip, which operates similarly to how synapses interact in the brain, contains 64 analog nuclei in its memory, each with an array of synaptic cell units. These chips achieve smooth transitions between analog and digital states through the use of converters.
The chips demonstrated an accuracy rate of 92.81% on the CIFAR-10 dataset, a popular collection of images used in machine learning.
Vasilopulos stated, “We demonstrate the accuracy of the output close to the software equivalent using Resnet and networks with a long short-term memory.” Resnet, which stands for “residual neural network,” is a deep learning model that can train thousands of layers in a neural network without sacrificing quality.
“To achieve a comprehensive reduction in the delay and energy consumption of AIMC, you need to combine with intracristal digital operations and intracrhistal communications,” said Vasilopulos. He also noted that the multi-core AIMC chip is manufactured using the 14-nm complementary technology “Metal-oxide-semiconductor with built-in memory with a phase change.”
The researcher pointed out that “large and more complex workloads can be implemented in media with low energy consumption or with a limited battery charge,” making them suitable for applications such as smartphones, cars, and cameras.
Furthermore, Vasilopulos suggested that “suppliers of cloud services will be able to use these chips to save electricity and reduce carbon dioxide emissions.”
IBM mentioned that future improvements to the digital schemes, which enable inter-level activation transmission and intermediate storage in local memory, will allow these chips to handle fully sequential workloads.
Vasilopulos wrote