Intel published the latest version of their compiler, ISPC 1.26 (Implicit SPMD Program Compiler), which is designed to compile code in the SI language with parallel programming extensions spmd (Single Program, Multiple Data). These extensions allow for parallel execution of multiple copies of a program with different input sets. The project is written in C++ and is distributed under the BSD license, with support for Linux, Windows, MacOS, and FreeBSD.
S-programs with SPMD extensions are compiled to run on SIMD computing blocks provided by CPUs and GPUs. This enables the utilization of SIMD vectorization mechanisms without the need for low-level optimization or explicit SIMD instruction usage. The SI language syntax and idioms are used to write parallelized functions, with spmd functions interacting directly with C/C++ functions and structures. Existing debuggers can be used for program debugging.
ISPC utilizes the LLVM infrastructure as a backend for code generation and optimization. It supports vector instructions for X86 (SSE2, SSE4, AVX, AVX2, AVX512) and ARM (Neon), as well as offloading computations to GPUs (Intel Gen9 and XE). ISPC can accelerate programs by 3 or more times on architectures with SSE blocks processing 4 elements at a time, and by 5-6 times on AVX architectures processing 8 elements at a time. The program also scales according to the number of processor cores.
The main enhancements in ISPC 1.26 include improved support for ARM processors:
- Improved ARM support:
- Behavior of the flag “–arch=ARM” has been updated to associate with ARMV8 architecture (32-bit), with the flag “–arch=Aarch64” for ARMV8 in 64-bit mode.
- Continued support for ARMV7 Cortex-A9 and Cortex-A15 processors.
- Added support for Cortex-a55, Cortex-A78, Cortex-A510, Cortex-A520, and new Apple ARM processors.
- New assembly targets: Neon-I16x16 and Neon-I8x32.
- Support for operations based on ARM SDOT and UDOT vector instructions.
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