Researchers from the Imperial College of London, Bilocon, and Burak Gunduz recently published an article focusing on the optimization of code in high-frequency trading (HFT) applications. The article, titled “low delay templates for high frequency trade,” emphasizes the importance of reducing delays in transactions, as every millisecond can make a difference in this fast-paced industry.
While HFT commonly utilizes solutions based on field programmable gate arrays (FPGAs) for their low delay and high parallelism, the main programming language used remains C++. The authors of the article outline various optimization methods, including pre-loading Kesh CPU, utilizing CONSTEXPR, loop unrolling, and inlining. Additionally, they introduce the concept of separating hot and cold paths in code to improve CPU cache usage and reduce branch mispredictions.
The implementation of these optimization techniques was tested using Google Benchmark and the results can be found in the authors’ GitHub repository. The article also discusses the impact of handling signed and unsigned numbers, data manipulation with floating point operations, and programming without locks using a ring buffer.
However, the article does not delve into memory access alignment or data copying optimization strategies. The authors suggest that these improvements can be easily added and tested alongside existing optimizations. Overall, the research highlights the significance of code optimization in achieving maximum performance, especially in demanding fields like high-frequency trading.