presented the release of the project qemu 7.1 . As an emulator, Qemu allows you to launch a program assembled for one hardware platform on a system with a completely different architecture, for example, to execute an ARM on the X86-compatible PC. In virtualization mode in Qemu, the productivity of code execution in an isolated environment is close to the hardware system due to the direct implementation of instructions on the CPU and the use of the Xen hypervisor or the KVM module. Platforms X86 of executable Linux files on architectures other than X86. Over the years of development, support for complete emulation for 14 hardware architectures was added, the number of emulated hardware devices exceeded 400. In the preparation of version 7.1, more than 2,800 changes were made from 238 developers.
Key improvements added to Qemu 7.1:
- On the Linux platform, the option is an option zero-copy-Send A>, which allows organizing the transfer of memory pages during live migration without intermediate buffering.
- In QMP (Qemu Machine Protocol), the possibility of using the Block-Export -add command for the export of NBD images with data on the pages in the “Dirty” state is added. New commands ‘Query-Stats’ and ‘Query-Stats-Schema’ were also added to request statistics from various Qemu subsystems.
- In the agent for guest systems, the SOLARIS platform has improved and new commands ‘Guest-Get-Diskstats’ and ‘Guest-Get-CPUSTATS’ to display the condition of the disks and CPU are added. The command of the Guest-Get-Disks ‘added information output from NVMe Smart, and the command of the Guest-Get-FSINFO’ display of data on the type of tire of NVMe.
- Added a new Loongarch emulator with support for a 64-bit option of architecture of a set of commands lockarch (La64). The emulator supports Loongson 3 5000 processors and the Northern bridges of Loongson 7A1000.
- ARM emulator implemented new types of emulated machines: Asped AST1030 SOC, QAULCOMM and AST2600 / AST1030 (FBY35). Support for emulation of the CPU Cortex-A76 and Neuverse-N1, as well as the processor extensions SME (Scalable Matrix Extensions), Ras (ReliaBility, AvalaBility, Serviceability) and commands for blocking leakage from internal cache during the speculative performance of instructions on CPU.
For cars ‘Virt’, an emulation of the GICV4 interruption controller is implemented. - In the Emulator of Architecture X86 for KVM, support for virtualization of the LBR trace mechanism (Last Branch Record) is added.
- In the HPPA architecture emulator, a new SEABIOS V6 firmware is proposed, which supports the use of the PS/2 keyboard in the boot menu. Envenged emulation of the sequential port. Added additional console fonts STI.
- In the emulator of the MIPS architecture for NIOS2 (-machine 10M50-GHRD), an emulation of the vector interruption controller (Vectored Interrupt Controller) and the shadow set of registers is implemented. Improved exclusion processing.