published a processor scheme that can be collected in transistors at home. The scheme is built only on logical elements not, or, and, xor, nor. As an example, a minimalistic 4-bit option is provided for 155 logical elements, but the bit of the bit you can set any, adding wires and logical elements.
the circuit is a Load/Store RAM machine performing one Load or Store operation for 2 tactes of the generator frequencies. An emulator is also written that allows you to write and perform Program for this scheme. Emulator code and scheme in the packet format logic circuit published under the MIT.
/Media reports.