Sifive company, based on the creators of the architecture, a set of RISC-V commands and at one time, prepared the first prototype of the processor based on the RISC-V, introduced / a> new RISC-V cpu core in the Sifive Performance line, which is 50% faster than the past top kernel P550 and ahead Performance ARM Cortex-A78, the most powerful processor based on Arm architecture. SOC on the basis of a new core is oriented primarily on server systems and workstations, but it is possible to create trimmed options for mobile and embedded devices.
It is stated that, compared to the P550, the new processor SIFIVE core contains 16 MB of L3-cache instead of 4MB, can combine in one chip up to 16 cores instead of 4, operates at a frequency to 3.5GHz instead of 2.4GHz, supports DDR5 memory and PCI tire -Express 5.0.
The overall architecture of the new nucleus is close to the P550 and also has a modular character that allows you to add additional blocks with specialized accelerators or GPU. The details are planned to be published in December, and the RTL data ready for experiments on FPGA will be published next year.
RISC-V provides an open and flexible system of machine instructions, allowing you to create fully open Soc and microprocessors for arbitrary applications, without requiring deductions and impose conditions for use. Currently, based on the RISC-V specification by various companies and communities under various free licenses (BSD, MIT, Apache 2.0) develops 111 Variants of the cores of microprocessors, 31 platform, 12 SOC and 12 ready-made boards .