alibaba, one of the largest Chinese IT companies, announced about opening the developments associated with the CPU cores Xuantie E902, E906, C906 and C910, built on the basis of the 64-bit RISC-V command set architecture. The open kernels of the Xuantie will develop under the new names of OpenC902, OPENE906, OpenC906 and OpenC910.
Schemes, descriptions of hardware blocks in the Verilog language, Simulator and related project documentation Published on GitHub under the APACHE 2.0 license. Separately published adapted to work with Xuantie chips Variants of compilers GCC and llvm , library glibc , toolkit binutils , loader u-boot , Linux kernel , connecting interface OpenSBI (RISC-V Supervisor Binary Interface), platforms for creating embedded Linux systems yocto , as well as patches to run Android platforms.
Xuantie C910, the most powerful of open chips is produced by the T-HEAD unit using a 17 NM technical process in a 16-nuclear version operating at a frequency of 2.5 GHz. The performance of the chip in Coremark test reaches 7.1 Coremark / MHz , which exceeds Arm Cortex-A73 processors. The entire company Alibaba has developed 11 different RISC-V chips, which have already been released more than 2.5 billion copies, and the company works on the formation of the ecosystem for further promotion of the RISC-V architecture not only for IoT devices, but also for other types of computing systems.
Recall that RISC-V provides an open and flexible system of machine instructions, allowing you to create microprocessors for arbitrary applications, without requiring deductions and not imposing conditions for use. RISC-V allows you to create fully open SOC and processors. Currently, based on the RISC-V specification by various companies and communities under various free licenses (BSD, MIT, Apache 2.0) develops