MIPS Technologies stops development of MIPS architecture in favor of RISC-V

MIPS Technologies is discontinued development of the MIPS architecture and switches to the creation of systems based on the RISC-V architecture. It was decided to build the eighth generation of the MIPS architecture on the developments of the open project RISC-V.

In 2017, MIPS Technologies came under the control of Wave Computing, a startup that produces machine learning accelerators using MIPS processors. Wave Computing went into bankruptcy last year, but reborn a week ago under a new name, MIPS. The new MIPS company has completely changed the business model and will not be limited to processors.

Previously, MIPS Technologies was involved in the architecture development and licensing of intellectual property associated with MIPS processors, not directly involved in manufacturing. The new company will be engaged in the production of chips, but based on the RISC-V architecture. MIPS and RISC-V are similar in concept and philosophy, but RISC-V is being developed by RISC-V International with community input. MIPS has made the decision not to continue developing its own architecture, but to get involved in collaborative work. It is noteworthy that MIPS Technologies is a member of RISC-V International, and the CTO of RISC-V International is a former employee of MIPS Technologies.

Recall that RISC-V provides an open and flexible machine instruction system that allows you to create microprocessors for arbitrary applications without requiring royalties or imposing conditions on use. RISC-V allows you to create completely open SoCs and processors. Currently, based on the RISC-V specification, various companies and communities under various free licenses (BSD, MIT, Apache 2.0) are developing several dozen variants of microprocessor cores, SoCs and already manufactured chips. RISC-V support has been present since the Glibc 2.27, binutils 2.30, gcc 7, and Linux kernel 4.15 releases.